The present invention relates generally to integrated circuits that include memory devices, and more particularly, to an integrated circuit with a memory and a memory repair system that repairs or makes accommodations for defective memory cells.
Semiconductor integrated circuits often include on-chip memory, like flash memory. The flash memory may have some defective memory cells due to, for instance, manufacturing process variations or aging. Rather than discarding the integrated circuit, it is more cost effective to provide circuitry for repairing the memory.
A known technique to avoid discarding the integrated circuits with on-chip memory that have defective memory cells is to use fuses such as polyfuses and antifuses and redundant memory sectors. Typically, a memory includes a set of memory sectors, and each sector includes a set of memory cells. The memory also includes a self-test circuit that tests each memory sector to located any defective memory cells. Methods of identifying defective memory cells are well known. A memory sector having one or more defective memory cells is referred to as a faulty memory sector.
When the self-test circuit identifies a faulty memory sector, a fuse corresponding to the faulty memory sector is deactivated using a laser or a voltage supply. A fuse corresponding to a redundant memory sector also is activated using the laser or the voltage supply based on the type of fuse. The redundant memory sector corresponds to the faulty memory sector. Then, the data that was to be stored in the faulty memory sector is instead stored in the redundant memory sector. The redundant memory sector is thus substituted for the faulty memory sector, and this is known as repairing the memory. However, this technique uses a large number of resources such as the fuses and the redundant memory sector. Further, the method of activating and deactivating the fuses is prone to errors and may result in improper operation of the memory device. It also is imperative that the redundant memory sector is the same memory type as the faulty memory sector. As the activation and deactivation of the fuses require external components such as lasers, this technique can be implemented only during initial testing of the integrated circuit (i.e., at the factory). There also is the possibility of the deactivated fuse being reactivated due to faulty deactivation and influences of external parameters such as temperature. Further, the faulty memory sector may have a large number of memory cells that are not defective apart from the few defective cells.
Another known method is the use of a repair circuit that includes a set of memory cells arranged as either a set of rows or a set of columns. The memory further includes a corresponding set of redundant rows or columns. The repair circuit can test the memory to detect and locate defective cells (i.e., the row or column of the defective memory cell). Then, data for memory cells of the identified row or column are stored in the corresponding redundant row or redundant column. However, for successful implementation of this method, it is essential that the sets of redundant rows and redundant columns are structurally similar to the sets of rows and columns of the memory. Further, the repair circuit requires additional processing and time to determine the row and column of the defective memory cell and substitute either of the identified row or column of the defective cell with the corresponding cells of the redundant row or column.
Therefore, it would be advantageous to have an integrated circuit with a memory that can be repaired not only during factory testing, but also on the fly during a lifetime of the integrated circuit using limited number of resources.